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PCIe lanes

Post Date: 2015-09-16

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smit9448 View Drop Down
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  Quote smit9448 Quote  Post ReplyReply bullet Topic: PCIe lanes
    Posted: 16 Sep 2015 at 7:16pm
With the Intel Core i7 6700K 4.0GHz which uses the Intel Z170 Chipset, how many PCI-E lanes will two graphic cards and a SSD PCI-E Card (400GB Intel 750 Series) (NVM Express) each be able to use? Thank you very much for any responses.
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  Quote db188 Quote  Post ReplyReply bullet Posted: 17 Sep 2015 at 3:34pm
z170 chipset offers x8/x8 or x8/x4/x4 configs. 

if you go with an Nvidia graphics card (because they limit 16-lane cpus) your limited to 2-way sli.  depending on the board (like MSI's Gaming M7) they exploit the various upgrade paths via the PCH with pcie switches to enable 3-way "crossfire" (AMD's multi card solution) support. 

it gets really complicated with z170 and its flexible PCH I/O.  there are so many combinations it comes down to selecting the right board for your needs.  you would have to do a lot of research with each mobo manufacturer.  i still don't think you can get 2 vid cards plus a pcie ssd with this platform, but i could be wrong.  you can get 2 M.2 SATA ssd with 2 vid cards in the mobo i referenced and a lot of other storage configurations that aren't pcie.  

edit: i just checked the aforementioned mobo and it does look like it supports x8/x8/x4 configs and M.2 pcie ssd.  i would still shoot a call to them to make sure you can run two graphics cards plus an M.2 pcie ssd at the same time. 


Edited by db188 - 17 Sep 2015 at 3:42pm
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  Quote smit9448 Quote  Post ReplyReply bullet Posted: 17 Sep 2015 at 3:51pm
Ok thank you for the information.
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  Quote  Quote  Post ReplyReply bullet Posted: 17 Sep 2015 at 4:33pm
There are a few high-end Z170 motherboards (Gigabyte Z170 G1 Gaming, EVGA Z170 Classified, ASUS Z170-WS, possibly others) that have PLX PCI-e switches on them. The PLX switch they use usually allows x16/x0/x16/x0 or x8/x8/x8/x8. But you must realize that there is no extra bandwidth to the processor; the PLX chip only redirects bandwidth. The PLX chip also consumes several watts of power and incurs a latency (140 ns or more) in communications between the processor and graphics cards. The latency isn't as critical as bandwidth in compute (scientific) applications, but for graphics it matters more.
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  Quote db188 Quote  Post ReplyReply bullet Posted: 17 Sep 2015 at 5:50pm
in case i was a little vague i just wanted to clarify that Skylake (I7-6700k and I5-6600K) are 16-lane processors.  also, the pcie ssd populate the x4 pcie 3.0 bandwidth.  there does seem to be some high end z170 mobos out there that can configure at least a x2 sli+pcie ssd, but i'd personally want to confirm that with a call to their tech support prior to building a system around z170.  you might just be better off going with X99 with a minimum of direct cpu 28-lane support. 
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  Quote  Quote  Post ReplyReply bullet Posted: 17 Sep 2015 at 7:52pm
The majority of SLI-capable Z170 motherboards are x8/x8 with the PCI-e 3.0 x4 going to the chipset. The PCI-e NVMe drives are supported by the High Speed I/O (HSIO) lanes that have Intel Rapid Storage Technology (RST) supported, which there up to 3 on the Z170 chipset. However, there are a lot of tradeoffs with the I/O, as you can see here: http://www.anandtech.com/show/9485/intel-skylake-z170-motherboards-asrock-asus-gigabyte-msi-ecs-evga-supermicro.
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  Quote db188 Quote  Post ReplyReply bullet Posted: 17 Sep 2015 at 10:22pm
excellent read, thx for the link.  i wasn't sure until i read this that you could do sli along with high speed pcie storage with this chipset.  has there been any latency/performance tests done with a config like that?  
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  Quote  Quote  Post ReplyReply bullet Posted: 17 Sep 2015 at 11:43pm
I haven't come across any comparisons with the Z170 latency, although I haven't explicitly looked for any, either. I would be interested in finding out about it, though.

You can actually do more high-speed storage on Z170 than X99 (or Z97), but the motherboard has to be configured correctly. The manufacturers really need to start publishing the block diagrams for their PCI-e lane and HSIO allocation so we know what is possible.
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